[IPOL discuss] use of Eigen for PCA/SVD computation in demo blm_color_dimensional_filtering

[Miguel Colom]

> CPU optimizations will include vector instructions: for example
> the SSE instruction "mulss" will multiply 4 floats with 4 other floats
> in a single clock cycle, and the recent CPUs (SSE4 generation) have a
> dot product instruction. The CPU cache size and pipeline management
> can also be improved in vendor implementations.

I'm not sure about if we should arrive to that degree of optimization.

IPOL is an electronic journal whose objective is to publish detailed
descriptions of algorithms and offering also the possibility to run them
on-line, as a proof that they work as intended and to be able to reproduce
the results easily.

In my opinion, the algorithms should be optimized in such a way its
complexity is reduced (for example, using the FFT instead of direct DFT
computations, using the image integral instead of computing distances
directly, etc), but using architecture-dependent CPU instructions isn't a
complexity improvement, but a CPU trick to speed the execution up.

For me, it doesn't make sense to get the code dirty with that tricks,
especially if they don't provide any important improvement to the
algorithm itself.

Miguel